SEMICONDUCTOR CHIP PACKAGES HAVING SOLDER LAYERS OF ENHANCED DURABILITY

摘要

SEMICONDUCTOR CHIP PACKAGES HAVING SOLDER LAYERS OF ENHANCED DURABILITY Solder layers in a semiconductor chip package, which electrically interconnect conductors used to gain electrical access to the electrodes on the semiconductor chip, are subjected to a transverse compressive force in excess of about 2 pounds per square inch. The semiconductor chip package can thereby undergo a marked increase in the number of cycles of heating and cooling before it falls due to increased thermal resistance arising from structural degradation of the solder layers.