| 摘要 |
PURPOSE:To eliminate the need to use plural picture files and input devices and to attain a fade-in action by writing and displaying a memory plane which fetches picture data in response to the resolution of the A/D conversion of a video signal and with control of the write timing. CONSTITUTION:A memory buffer (memory plane) 12 of a picture processor which performs the fade-in/fade-out actions contains (n) pieces of areas (X'XY') having capacity corresponding to the display screen (XXY) of a CRT 7. These areas (X'XY') gives the D/A conversion to the picture data stored in the memory 12 and turns them into video signals for display. When the picture data are stored in the plane 12 consisting of (n) areas, the video signals of the picture read out of a picture file are turned into the picture data through the A/D conversion performed with n-bit resolution. This picture data is written to each area corresponding to the contents of (n) bits. The luminance of each picture element is shown by each bit and the depth direction of the luminance is defined as the plane numbers. The fade-in/fade-out actions are carried out by fetching and displaying successively plane numbers 1, 2, 3- and changing the rate of luminance between two screens. |
