发明名称 CIRCUIT AND METHOD FOR COMPARATOR OFFSET ERROR DETECTION AND CORRECTION IN AN ADC
摘要 The present invention relates to a method for calibrating an analog-to-digital converter, ADC, converting an input voltage signal into a digital output signal representing said input voltage signal. The method comprises : - sampling the input voltage signal applied to the analog-to-digital converter, - comparing the sampled input voltage signal with an output signal of a feedback digital-to-analogue converter, DAC, - determining in a search logic block of the ADC a digital code representation for the comparison result, -- performing a calibration by : performing an additional cycle wherein the last comparison carried out for determining the least significant bit of said digital code representation is repeated with a second comparator resolution mode different from a first comparator resolution mode used in at least said last comparison, so obtaining an additional comparison, determining from the difference between the results of said additional comparison and said last comparison the sign of a comparator offset error between said first and said second comparator resolution mode, tuning, in accordance with said sign of said comparator offset error, a programmable capacitor (C cal1 ) connected at the input of said comparator, thereby inducing a voltage step to counteract said comparator offset error.
申请公布号 EP3059868(A1) 申请公布日期 2016.08.24
申请号 EP20150165432 申请日期 2015.04.28
申请人 STICHTING IMEC NEDERLAND 发明人 HARPE, PIETER
分类号 H03M1/10;H03M1/06;H03M1/46 主分类号 H03M1/10
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