发明名称 FORMATION OF MULTILAYER INTERCONNECTION
摘要 PURPOSE:To flatly form wirings and to eliminate disconnection and shortcircuit of wiring metals by using two or more types of insulating films having different etching velocities as an interlayer insulating film, forming primary electrode and layer wiring metals with the insulating films as spacers, and forming a buried metal for flattening a contacting hole corresponding part of the insulating films in this case. CONSTITUTION:The first insulating film 2a is formed on a substrate 1, and a photoresist 3 is patterned thereon. Then, with the photoresist 3 as a mask the film 2a is removed, and an ohmic metal 4 is deposited. Then, the photoresist 3 is removed, and a gate metal 5 is formed in the film 2a by similar method. Similarly, the second insulating film 2b is formed, and a buried metal 6a is buried in the through-hole corresponding part. The third insulating film 7a is formed thereon, and the metal 8 of the first layer is then formed. At this time, the film 7a has faster etching speed than the film 2b, and the film 2b is not removed by etching when the third film 7a of the metal 8 is removed.
申请公布号 JPS61283144(A) 申请公布日期 1986.12.13
申请号 JP19850124295 申请日期 1985.06.10
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 SUMIYA KOICHI;YANO NORIYUKI
分类号 H01L21/3205 主分类号 H01L21/3205
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