| 摘要 |
PURPOSE:To realize easily the coexistence of logic level with an emitter coupling logic circuit in other circuit devices by inputting at least an input/output signal from a source coupling FET logic circuit and processing a signal existing before output and after input with the direct coupling FET logic circuit. CONSTITUTION:A complementary output of an input circuit comprising the source coupling logic circuit SCFL 11 is inputted to a couple of direct coupling FET logic circuits DCFL 12, 13 constituting a part of the processing circuit. The logic level inputted from the emitter coupling logic circuit ECL of an external Si circuit device to the SCFL 11 is -1.0V at high level and -1.8V at low level and the logic level of the SCFL 11 at an output node 14 is selected as -0.2V for high level and -1.0V for low level and it is possible to connect the SCFL 11 to the DCFLs 12, 13. The output of the DCFL 21 constituting the processing circuit in the output section is inputted to a source follower 22 for conversion, a complementary output is formed by the SCFL 25 having drive capability expansion source followers 23, 24 and inputted to the external Si circuit device ECL. |
