| 摘要 |
PURPOSE:To improve the reliability of trace information by issuing a write request at every variation of each event of logic information and a reference signal of a prescribed period, tracing the logic information and the reference signal by OR of both requests, and compressing and storing a trace signal in a time base direction. CONSTITUTION:(n) pieces of logic information are stored in an FF 1 and transferred to a buffer FF 2 after one cycle, the information of both FFs 1, 2 is compared by a comparing circuit part 3, and at the time of dissidence, a write request signal is issued, a reference signal whose value is varied at every two cycles is generated by a reference signal circuit part 4, and a write request signal is generated. Next, both the write request signals are brought to OR by an OR circuit 5, the information of the FF 2 and the signal of the circuit part 4 are traced to a storing circuit 6 by a write controlling circuit part 7, and a trace address of the circuit 6 is controlled by providing an address counter on the circuit part 7. |
