| 摘要 |
PURPOSE:To obtain an I/O circuit to ensure a high speed, low power comsumption and high reliability by providing a switch circuit which is provided between an output terminal of an input buffer circuit and an input terminal of a latch circuit and introduce an output of an input buffer circuit directly to latch circuit in accordance with the generation of an I/O switching control circuit. CONSTITUTION:When a WE signal is at a low level, the deivce is in the input data write enable condition and when is at a high level, is in the read enable condition. When the WE signal is at a low level under the write enable condition, a SW circuit 34 in on, the device has a bus to write data outputted from an input buffer circuit 12 directly to a memory circuit 13 and that to write data to a latch circuit 16 through the SW circuit 34. On the other hand, when an address will not change and the WE signal is changed from a low level to a high level, the device is read enable state, and an output buffer circuit 7 is bought into enable condition. Simultaneously, the SW circuit 34 becoms off, and data latched by the latch circuit 16 at the time of writing are outputted outside through the output buffer circuit 17. |
