发明名称 ENVELOPE EXTRACTION CIRCUIT
摘要 PURPOSE:To decrease the time constant of an integration circuit and to quicken the response speed by providing a peak hold circuit holding a peak level of an audio signal, a reset circuit, a sample-and-hold circuit and the integration circuit. CONSTITUTION:Since an output of a reset circuit 9 at a point (b) shown a waveform in figure (b), the output waveform of the peak hold circuit 3 is as shown in figure (d) and the amplified audio signal (a) is reset at a zero cross point where the signal is changed from negative to positive values. The waveform (d) is inputted to the sample-and-hold circuit 14, which has a waveform at a point (c) as shown in figure (c), then the output waveform of he circuit 14 is as shown in figure (e), that is, the amplified audio signal (a) is subject to sample and hold at zero cross point where the signal is changed from positive to negative values. The integration circuit 21 integrates the waveform (e) to output an envelope shown in figure (f). Thus, the integration circuit 21 has only to act on the hatched parts only by its integration action as shown in figure (f).
申请公布号 JPS61280108(A) 申请公布日期 1986.12.10
申请号 JP19850121549 申请日期 1985.06.06
申请人 KORUGU:KK 发明人 NISHIJIMA HIROAKI;HONMA HIDENORI
分类号 H03D1/00 主分类号 H03D1/00
代理机构 代理人
主权项
地址