发明名称 DATA BUFFER CIRCUIT
摘要 PURPOSE:To keep the interval of a transmission interrupting signal constant and to lighten the burden imposed on software by holding the 1st-byte data in a closed mode and transmitting the held data corresponding to the 1st transmission interruption request signal at the time of starting transmission. CONSTITUTION:When a central control unit 100 requests a serial data output signal 105 to be closed, a data register 107 fetches the 1st-byte data through a data bus 112, and holds it. When the closure is released to be in a transmission mode, and when a counter circuit 108 counts the 1st transmission interruption request signal 110, the contents of the data register 107 are transmitted to a parallel/serial converting circuit 101 through a selecting circuit 106. Then, when the 2nd transmission interruption request signal 110 is counted, a control circuit 109 transmits the interruption request signal to the central control unit 100, and the selecting circuit 106 fetches data at the side of the data bus and transmits it to the parallel/serial converting circuit 101.
申请公布号 JPS61278955(A) 申请公布日期 1986.12.09
申请号 JP19850120887 申请日期 1985.06.03
申请人 NEC CORP 发明人 AKITA KUNIHIKO
分类号 G06F13/00;G06F13/38 主分类号 G06F13/00
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