CIRCUIT TO MINIMIZE LOCAL CLOCK FREQUENCY DISTURBANCES WHEN PHASE LOCKING TO A REFERENCE CLOCK CIRCUIT

摘要

TITLE CIRCUIT TO MINIMIZE LOCAL CLOCK FREQUENCY DISTURBANCES WHEN PHASE LOCKING TO A REFERENCE CLOCK CIRCUIT A frequency disturbance minimization circuit for use in a phase locked loop circuit. A pulse generator eliminates random phase shift, which occurs after a reference clock outage, by synchronizing counted down derivatives of the local and reference clock circuits. A window circuit provides a signal representative of the difference in phase between these local and reference clock circuits. A counter accumulates these phase difference window signals for periodic interrogation by a microprocessor which causes a voltage controlled oscillator to adjust its frequency in the direction necessary to eliminate this phase difference.