| 摘要 |
PURPOSE:To attain high speed processing with miniaturization independently of the quantity of decision by providing plural circuits storing a destination address of a received frame at each unit quantity. CONSTITUTION:A station receiving a frame applies serial/parallel conversion converting a frame of a transmission line being a serial data 10 into a parallel data at each unit quantity. A destination address DA in the data converted into the parallel data 12 is transferred into to an address discrimination circuit 14 and stored sequentially alternately to a storage circuit 18 and a storage circuit 19 at each unit quantity converted by a serial/parallel conversion circuit 11. Two storage circuits per unit quantity of the destination address are stored and data are stored alternately, then the holding time of data per one storage circuit is double in comparison with one storage circuit employed. Thus, the decision processing is applied in a double time range, then the decision exceeding the processing time range per unit quantity is processed sufficiently.
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