| 摘要 |
<p>PURPOSE:To simplify the circuit constitution by providing a reference digital signal generating circuit, an input circuit receiving an input data in parallel, an OR circuit taking exclusive OR between the input data and the corresponding reference digital signal and an output circuit in parallel with the output. CONSTITUTION:A reference digital signal generating circuit 1 uses outputs of D-FFs 21-23 as reference digital signals and the signals have the same pattern. Then the input data is received by using a word clock being 3 times of the shift clock from a shift clock input terminal 8 and the input data and the reference signal from each D-FF are subjected to scramble or de-scramble by exclusive OR circuits 31-33 by using the same word clock. Then in latching the output, a parallel data subjected to scramble or de-scramble is obtained at an output terminal 6. Thus, no parallel/serial nor serial/parallel circuit is required.</p> |
