发明名称 |
Bit error detection circuit for PSK-modulated carrier wave |
摘要 |
A bit errror detection circuit for checking the quality of a transmission path by accurately predicting a true bit error rate (BER) despite changes in the operating point of a non-linear element or fluctuations in the level of an input signal. An inputted PSK-modulated carrier wave is separately phase demodulated by a recovered carrier wave and a phase modulated carrier wave. These two phase demodulated PSK-modulated carrier waves are inputted into separate discriminator circuits 412 and 413 having a common discrimination level where the difference between the outputs can be compared by the comparator circuit 409 to predict a true BER.
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申请公布号 |
US4628507(A) |
申请公布日期 |
1986.12.09 |
申请号 |
US19840599362 |
申请日期 |
1984.04.12 |
申请人 |
NEC CORPORATION |
发明人 |
OTANI, SUSUMU |
分类号 |
H04L1/00;H04L1/24;H04L25/02;H04L27/00;H04L27/18;H04L27/227;(IPC1-7):H04B17/00;G06F11/00 |
主分类号 |
H04L1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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