发明名称 MANUFACTURE OF MES FET
摘要 PURPOSE:To manufacture a FET having high mutual conductance by forming a channel layer, to which an impurity is doped to a two-element thin surface shape, by using a MBE method. CONSTITUTION:A non-doped I-GaAs layer 8 is crystal-grown on a semi-insulating GaAs substrate 1 through a MBE method. The projection of Ga is stopped with the device, Si is projected into an atmosphere only consisting of As, and an impurity is doped to a monoatomic layer. The thin planar doping layer shapes a channel layer 9. Si is stopped, Ga is projected into the atmosphere composed of As again, and I-GaAs 10 is grown in 100Angstrom . Tungsten silicide WSix is laminated through a sputtering method, and a gate electrode 11 is shaped through a photolithographic method and an etching process. Si ions are implanted into a region 12 by using the gate electrode 11 as a mask. The ions are implanted, and an implantation layer is heat-treated, thus recovering crystallizability and electrically activating the device.
申请公布号 JPS61276270(A) 申请公布日期 1986.12.06
申请号 JP19850118529 申请日期 1985.05.30
申请人 FUJITSU LTD 发明人 INADA TSUGUO;SASA MASAHIKO
分类号 H01L29/812;H01L21/265;H01L21/338;H01L29/36;H01L29/778 主分类号 H01L29/812
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