| 摘要 |
PURPOSE:To eliminate the trouble of parasitic capacitance caused by the presence of an impurity in a high impurity-concentration region in the same extent as a buried region even when the high impurity-concentration region does not reach the buried region by previously forming the high impurity-concentration region at a position where a selective oxidation region is shaped. CONSTITUTION:An N<+> conduction type buried region 2 is formed onto the surface of a substrate 1, and N conduction type vapor phase growth layer 3 is deposited in the buried region, silicon dioxide 4 is shaped and an silicon nitride layer 5 is further laminated and deposited. The silicon nitride layer and the silicon dioxide layer are removed selectively to obtain a mask pattern for silicon nitride, and an exposed vapor phase growth layer 3 section is removed in approximately 0.7mum depth through a wet-type etching method. An N<+> conduction type region 7 is shaped to the vapor phase growth layer 3 extending over a projection section to the buried region 2 from a central recessed section 6 through said removal. The Si semiconductor substrate 1 with an silicon nitride mask is heated at approximately 1,000 deg.C to form a selective oxidation region 8(8'). The N<+> conduction type region 7 shaped from the recessed section 6 is also oxidized through the process of the formation of the region 8(8'), but the greater part of the impurity in the region 7 are left naturally in the selective oxidation region 8.
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