发明名称 EXTERNAL SWITCH INTERRUPTION CONTROL SYSTEM
摘要 PURPOSE:To execute a requested processing with an external switch without resetting the whole of a system by making it possible that the processing of the system is continued by the interrupt request due to the external switch though a processor cannot accept interrupts. CONSTITUTION:When an interrupt occurs in a main processor 12, an interrupt accepting part 19 is started. If this interrupt is caused by the depression of an external switch 10, the interrupt accepting part 19 starts an external switch interrupt processing part 21 to execute a prescribed processing to which the external switch 10 is allowed to correspond preliminarily. The external switch interrupt processing part 21 is started by a reset factor discriminating part 20 also. The reset factor discriminating part 20 is provided in a processing routine which is started by resetting the main processor 12, and the reset factor discriminating part 20 starts the external switch interrupt processing part 21 without initializing the system if the reset factor is caused by the depression of the external switch 10. At this time, the external switch interrupt processing part 21 processes the interrupt as started by the interrupt accepting part 19.
申请公布号 JPS61275938(A) 申请公布日期 1986.12.06
申请号 JP19850117758 申请日期 1985.05.31
申请人 PANAFACOM LTD 发明人 IKEDA KAZUHIKO;KAWAMURA MAKOTO;KOJIMA YASUFUMI
分类号 G06F9/48;G06F9/46;G06F11/30 主分类号 G06F9/48
代理机构 代理人
主权项
地址