| 摘要 |
PURPOSE:To improve the probability of data reception by reporting the validity of output data to an external device through a signal output means to output data to the external device smoothly and facilitating the retry of the external device. CONSTITUTION:When a signal S' from a data processing part CPU 1 is in high level, the signal is given to a clear terminal CR of a counter 3 through an OR gate 5. and the counter 3 is cleared independently of a clock CLK from the external device. Meanwhile, the signal S' passes a NOR gate 6 to become a low-level signal S and is given to the external device. When the signal S' goes to the low level, clearing of the counter 3 is released, and the counter 3 starts counting the clock CLK from the external device thereby. A data selector 2 converts 8-bit parallel data given from the CPU 1 to serial data on the basis of the output from the counter 3 and outputs it successively. |
