发明名称 REPRODUCING SIGNAL PROCESSING CIRCUIT FOR VTR
摘要 PURPOSE:To prevent the occurrence of outrunning of address by detecting the reading/writing address difference of buffer memory of a reproducing circuit of VTR and controlling the jumping of reading address at the time of reproducing at speed of (1+ or -alpha) times. CONSTITUTION:Difference Adj of addresses from the read address write address generating circuits 15, 13 of a buffer memory 14 of plural, (n) etc. fields is detected by a comparator circuit 18. At the time of (1+alpha) times reproducing, when read address is [(n-1)+alpha<Adj=n] field or [(n-alpha)<Adj<n] field, K=1, 2 read addresses are jumped and advanced. Similarly, at the time of (1-alpha) times reproducing, when [0<Adj<(1-alpha)] or (0<Adj<alpha) field, K field read address is returned, and outrunning of write address by read address is prevented, and discontinuous picture image due to outrunning does not occur.
申请公布号 JPS61276490(A) 申请公布日期 1986.12.06
申请号 JP19850117764 申请日期 1985.05.31
申请人 SONY CORP 发明人 SUMA TETSURO;OGAWA TETSUO
分类号 G11B20/10;H04N5/93;H04N5/937 主分类号 G11B20/10
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