| 摘要 |
PURPOSE:To improve step coverage by a method wherein the whole surface is covered with the lower insulation layer after formation of the lower wiring layer, and the upper end surface is flattened by applying heat-resistant region; then, the whole surface is covered again with the lower insulation layer after control etching, and the upper layer wiring is formed thereon. CONSTITUTION:After an SiO2 film 12 is formed on the surface of a semiconductor substrate 11, the Al lower wiring layer 13 is formed. Next, a PSG is formed over the lower wiring layer 13 and the film 12 and made as the lower layer insulation film 14, and a heat-resistant regin layer 15 is applied over it. The upper layer insulation film 16 is formed over the flattened surface by control-etching the insulation film 14 and the layer 15. Further, a through hole penetrating through the upper and lower insulation films 14 and 16 is opened, and the upper wiring layer 17 is formed. This makes the step produced by the lower layer wiring to be flattened at the step of the formation of an interlayer insulation layer, resulting in the prevention of defective wiring such as the disconnection of the upper layer wiring. |
