发明名称 SIGNAL INSERTION SYSTEM
摘要 PURPOSE:To minimize an identification error at a receiving side by providing a signal insertion circuit to which the signal is inserted as the one having a larger level difference than the maximum level difference which an ordinary data can obtain when a signal is converted to an analog value. CONSTITUTION:An inversion/non-inversion signal is '0' except at a frame slot and at the frame slot, it becomes '1' in an inversion time and '0' in a non- inversion time. Therefore, except at the frame slot, it can be said that D0'='0', D1'=D0, D2'=D1 and D3'=D2 and at the frame slot, all of the D0'-D3' become '1's in the non-inversion time and all of the D0'-D3' become '0's in the non- inversion time. An intermediate level between the level of '0000' in the non- inversion time and the level of '1111' in the inversion time is slipped off an ideal average in the ordinary data and a symmetrical characteristics is lost, however, a problem is resolved by changing the volume of an integrating value with increasing or decreasing in the non-inversion and the inversion time at a non-inversion/inversion deciding circuit.
申请公布号 JPS61274455(A) 申请公布日期 1986.12.04
申请号 JP19850115812 申请日期 1985.05.29
申请人 FUJITSU LTD 发明人 IIZUKA NOBORU
分类号 H04L25/49;H04J3/06;H04L1/00;H04L7/06 主分类号 H04L25/49
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