| 摘要 |
PURPOSE:To improve processing capacity by setting a flag that indicates address expansion to input/output instruction and making a channel device detect the flag and select an expansion address and make it an address of input/output processing. CONSTITUTION:Input/output instruction from a central processing unit is stored in a register 3-3. The #8 bit of the register 3-3 is connected to a gate circuit 3-1, and #8 bit is made logic '1' by expansion address designation and #8 bit is made logkc '0' by ordinary address designation. When logic '1' is inputted, the gate circuit 3-1 becomes on. A multiplex circuit 3-2 outputs a register 3-6 when the gate circuit 3-1 is logic '1', and outputs a register 3-5 when the gate circuit 3-1 is logic '0'. Low address of a register 3-4 that stores channel com mand words is inputted to a register 3-5, and low and high addresses of the register 3-4 are stored in a register 3-6 as high and low addresses.
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