发明名称 DATA PROCESSING SYSTEM
摘要 <p>PURPOSE:To attain a parallel data processing system by writing the processing data to a part of a dual port memory by a selection switch command given from the 1st processor and processing the data by the 2nd processor in response to an interruption request given from the 1st processor. CONSTITUTION:A microprocessor 1 controls a memory 2 and an I/O device 3 to perform a series of operations. While a microprocessor 8 controls a memory 9 and an I/O device 10 to perform another function. The access to a dual port memory 7 is always possible from both processors 1 and 8. Then the processor 8 can always give an access to a dual port memory group 11. While the processor 1 can give an access to only one dual port memory that is selected by a memory window switching circuit 12. When the processor 1 wants to process data by means of the device 10, the data are first written to the memory 11 and an interruption is applied to the processor 8 from an interruption generating mechanism 6. Thus the processor 8 processes the data written to the memory 11 in response to the interruption request. Thus data can be processed in parallel with each other.</p>
申请公布号 JPS61273659(A) 申请公布日期 1986.12.03
申请号 JP19850117068 申请日期 1985.05.30
申请人 NEC CORP 发明人 KUROIWA KENICHI;NAGANUMA MASAAKI
分类号 G06F15/167;G06F15/16 主分类号 G06F15/167
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