摘要 |
A pulse width modulated inverter system includes a comparator for comparing an output voltage with the sum of a reference voltage and a maximum allowable ripple voltage. The comparator further includes an input from the ripple current in a filter capacitor to determine when to switch between two DC voltage buses such that the maximum allowable ripple voltage will not be exceeded. The ripple voltage is constrained such that when the current is switched to maintain the ripple voltage within the set limits, the pulse width modulation frequency is maintained at a desired frequency.
|