发明名称 Method for planarizing an isolation slot in an integrated circuit structure
摘要 An improved method for planarizing an isolation slot, having its walls previously oxidized, is disclosed which comprises depositing a first layer of a material; etching the first layer back to a predetermined depth below a reference point; depositing a second layer of an oxidizable material on the surface of the first layer; etching the second layer; and then oxidizing the second layer of oxidizable material. Formulas are disclosed for calculating the minimum and maximum depths of the etch back of the second layer and the minimum depth of the etch back of the first layer given the width of the slot and the thickness of the oxide layer to be grown in the surface of the second layer to thereby insure that any voids, microcracks, or discontinuities formed in the second layer are removed by the etch and that the oxide subsequently grown in the surface of the second layer does not penetrate down to the surface of the first layer and any voids, microcracks, or discontinuities therein.
申请公布号 US4626317(A) 申请公布日期 1986.12.02
申请号 US19850719185 申请日期 1985.04.03
申请人 ADVANCED MICRO DEVICES, INC. 发明人 BONN, MATTHEW A.
分类号 H01L21/3213;H01L21/762;H01L21/763;(IPC1-7):H01L21/306;B44C1/22;C03C15/00;C03C25/06 主分类号 H01L21/3213
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