| 摘要 |
PURPOSE:To simplify an error correcting device by providing a memory converting a decode output in the 2nd direction into the series of the 1st direction error correction code and a flag memory storing the 2nd direction decoding error information. CONSTITUTION:A video reproducing data arranged in a matrix is subjected to an error correction decoding by using the 2nd direction correction code (inner code), the result is stored in a buffer memory 21 via serial parallel converting circuits 24A, 24B,-24H and a flag bit representing the data error is stored in a flag memory 22. Then a video data is read from the buffer memory 21 via parallel series conversion circuits 25A, 25B,-25H, the 1st direction correction code (external code) is used with the flag bit to apply error correction and normal reproduction is applied via a D/A converter. At high speed reproduction, the system is controlled so as to write a data not being the 2nd direction error only into the flag bit, the error data is sent to an error correction circuit, where the data is corrected. Thus, a multiplexer circuit used in a conventional system is not required and then the system is simplified. |
