| 摘要 |
PURPOSE:To remarkedly shorten the well-forming process of a CMOS semiconductor device provided with a double well by a method wherein P ions are implanted in the whole surface of the N-type Si semiconductor substrate, the N-type ion-implanted layer is provided, the region other than the region, under which the P-type well layer is to be formed, is covered with the photo resist film and B ions are implanted. CONSTITUTION:A thermal oxide film 20 is provided on the whole surface of an N-type Si semiconductor substrate 19, P ions 21 are implanted and an N-type ion-implanted layer 22 is formed. Then, Si3N4 films (silicon nitride films) 23 are selectively formed on the active region by a CVD method, the region other than the region, under which a P-type well layer 27 is to be formed, is covered with a photo resist film 24, B ions 25 are implanted, the concentration of the P ions 21 are negated and a P-type ion- implanted layer 21' is formed. The photo resist film 24 is removed, and an N-type well layer 26 and the P-type well layer 27 are formed by performing a thermal diffusion. After an annealing is performed, the well layers 26 and 27 are individually isolated by thick oxide films (thick SiO2 regions) 28 and the Si3N4 films 23 are removed. After that, a LOCOS process is executed. According to this method, the manufacturing process of the double well can be remarkedly shortened. |
