发明名称 ASSOCIATIVE MEMORY
摘要 PURPOSE:To attain high-speed data input/output and retrieval with simple constitution without using address information by providing a data insertion means and an extraction means to a memory loop comprising connecting delay elements in a loop to input/output data via a buffer of an asynchronous delay line. CONSTITUTION:Plural asynchronous digital delay elements are connected to form a memory loop 1 and a data from an input buffer 21 of asynchronous delay line is inputted continuously to the loop 1 via a data insertion device 2 in response to a control signal 22 commanding data insertion. On the other hand, data such as comparison data 32, master data 33 and a comparison instruction are compared by a comparator 3, which retrieves the data, and the data through coincidence retrieval is extracted from the loop 1 and outputted via an output buffer 31 of the asynchronous delay line. Thus, data input/output and retrieval are attained at high speed without using address information, no decoder is required to simplify the constitution.
申请公布号 JPS61271697(A) 申请公布日期 1986.12.01
申请号 JP19850113416 申请日期 1985.05.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUGANO MASAHIDE
分类号 G11C15/00;G11C15/04 主分类号 G11C15/00
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