发明名称 SEMICONDUCTOR WAFER INSPECTING DEVICE
摘要 PURPOSE:To inspect all chips preventing any address slippage from happening by a method wherein matrix type chips on a wafer are marked referring to preliminarily specified positional relations; marks are detected to specify the addresses of all chips; and each chip is inspected by probes referring to the specification. CONSTITUTION:A map memory 27 and a stepping processor 21 are respectively informed of specified data and step data on a wafer 12 from an input output device 20. The wafer diameter is detected 32 and the signal is processed by wafer diameter detection and full chip recognizer 33 and then a stage-shifting mechanism 11 of a stage 10 is controlled by a stage-shifting controller 22. The chip-dividing lines 13 are detected 32 and the stage 10 is rated and parallel-shifted by the stage-shifting mechanism 11 to set chip pad to probes 23. The stage 10 is shifted by a stepping processor 21 to shift each chip by specified amount. The addresses of all chips 14 are specified starting a chip A to detect an element 14b to be inspected as a reference point for inspecting the specified address of chips 14 refering to the memory contents. Through these procedures, the addresses can be specified consistently regardless of any chip slippage making efficient defect analysis etc. feasible since the marked ships are detected making reference to addresses.
申请公布号 JPS61270844(A) 申请公布日期 1986.12.01
申请号 JP19850112840 申请日期 1985.05.25
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 SHINMIYO YOSHIHIKO
分类号 H01L21/66;H01L21/00;H01L21/67;H01L21/68;(IPC1-7):H01L21/68 主分类号 H01L21/66
代理机构 代理人
主权项
地址