| 摘要 |
PURPOSE:To facilitate the debugging of a sequence which has complicate conditions by comparing various data with comparative data which is prepared and initiating an interruption when coincidence with the last comparative data is detected. CONSTITUTION:For example, software instructions A, D, E, and B appear in order, the operand in an address (c) is accessed with the instruction B, and an interruption is initiated when the instruction in an address B3 is executed. The processing is advanced to detect coincidence with the operand address (c) with a microinstruction address B2 in the instruction B and a coincidence of the address B2 with the microinstruction address B3. The control bit of a word from a storage circuit 2 is 1 and a control circuit 5, therefore, outputs a sequence check signal to an iterruption generating circuit 8 to send out an interruption generation indication. The circuit 8 initiates an interruption according to the indication and starts a debugging interruption processing program after the software instruction being executed is completed. |
