| 摘要 |
PURPOSE:To shorten the stop time of an instruction read out wait operation by changing a pointer without flashing a queue and executing branching operation or flashing the queue and reading an instruction out of a memory newly. CONSTITUTION:When a branch instruction is generated, a branch address DISP is given. The DISP is supplied to adding circuits 14 and 15 together with its sign and the circuit 14 adds the DISP to the contents of a counter CB for the remaining number of instructions. When the DISP is negative and A+B is positive, a signal 271 becomes active to indicate that the branch destination instruction is an address CR+DISP indicated by a read out counter among instructions in a queue memory 1 which are already executed. Similarly, the circuit 15 subtracts the DISP from the number CP of pre-fetch instructions and checks whether the DISP is within the range of the CF. The DISP should be a positive value and an AND gate 28 signifies a signal C=1 indicating that the subtraction result is >=0 when the DISP is positive, namely, when S=0, thereby indicating that the branch destination instruction is in an address CF+ DISP among pre-fetch instructions in the queue memory.
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