发明名称 CORRECTING CIRCUIT FOR TIMER INTERRUPTION
摘要 <p>PURPOSE:To take an invariably accurate measurement of time by initiating a timer interruption to a CPU and measuring the elapsed time up to he response of the CPU by adding a counter. CONSTITUTION:An N-scale counter 5 initiates a timer interruption at a predetermined period T. An FF 6 generates an interruption signal and an interruption flag. An AND circuit 7 is an AND gate for clock generation which counts the number of times of interruption when an interruption response becomes longer than the period T. The contents of a binary counter 8 which counts the number of times of interruption are read in from an input port 9 in the interruption processing routine regardless of whether the time from the input of an interruption signal to the CPU 1 to the response by an interruption processing routine is longer or shorter than the period T determined by an oscillator 4 and the N-scale counter 5, thereby measuring the accurate time.</p>
申请公布号 JPS61269737(A) 申请公布日期 1986.11.29
申请号 JP19850110379 申请日期 1985.05.24
申请人 HITACHI LTD 发明人 SHIBUYA SATOSHI
分类号 G06F9/48;G06F1/04;G06F1/14;G06F9/46 主分类号 G06F9/48
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