发明名称 GENERATION OF TEST PATTERN FOR LOGICAL NETWORK
摘要 PURPOSE:To enable the generation of a test pattern effective for at least one logical network by activating a traced pass and using an input pattern sequence. CONSTITUTION:First, a signal is generated for a pass for a node controllable from an observable node via an operator node to activate nodes on traced passes. Then, lines for connecting the activated nodes are realized. That is, a circuit comprising the combination of the nodes and passes is described as a model and, by using methods for tracing, activating and realizing the passes on one hand and using a sequential pattern for activating the passes including a sequential circuit on the other hand, an effective test pattern can be generated.
申请公布号 JPS61269083(A) 申请公布日期 1986.11.28
申请号 JP19850266440 申请日期 1985.11.26
申请人 NEC CORP 发明人 KAWAI MASATO
分类号 H04L29/14;G01R31/28;G01R31/3183;G06F17/50 主分类号 H04L29/14
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