| 摘要 |
PURPOSE:To execute an access at a high speed by inputting the first address information in a memory cycle being previous by one, starting the decoding as soon as the memory cycle is started, and inputting and decoding the second address information after the memory cycle has been started. CONSTITUTION:At the time of a rise of a row address strobe signal, an output address of a selector 27 is switched to a row address, and at the time of a rise of a column address strobe signal, the row address is inputted to a buffer 211. At the time of a fall being the time for starting a memory cycle, the output address of the selector 27 is switched to a column address, and at the time of a fall of the column address strobe signal, a buffer 23 inputs a column address and it is decoded by a column address decoder/selector 24. On the other hand, as soon as the memory cycle is started, a buffer 212 receives the row address from the buffer 211 and decodes it. In this way, an access to a memory cell array 25 can be executed at a high speed.
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