ANALOGOUS AND APERIODICAL FREQUENCY DIVIDER BY TWO

摘要

A frequency divide-by-two circuit capable of operating from substantially DC up to the maximum operating frequency of the component devices. First and second mixer stages receive the signal to be divided and its antiphase complement. The mixer output signals are amplified and summed. A portion of the sum signal is fed back to the other inputs of the mixers. The mixing amplifying and summing functions can all be performed by two FETs each having two gates. The divider can be integrated on a single chip since it does not make use of a filter. It can be used at frequencies of up to about 25 GHz.