| 摘要 |
PURPOSE:To make hardware of a selected signal system compact and simplify circuits following it by providing a converting circuit which converts a decimal channel designating signal designating a channel to a binary channel designating signal. CONSTITUTION:A signal line group 14 consists of lines (a)-(d) to form 16 channels (CH) in time series. The signal line (a) is selected for CH 3 bit information inserted to the signal line group 14 and transmitted by a signal line selecting circuit 24 which receives low-level signals on lines 21 and 22, and the CH 3 is selected in an intra-CHX bit information selecting circuit 25 by a channel pulse P2 on a line 18, and its bit information is displayed on a CH 3 bit information display part of a CHX bit information display device 23, CH bit information of all CHs are inserted to and extracted from the signal line group 14 similarly. Thus, the number of signal lines led out from a channel selecting circuit 15 is considerably reduced to 6, namely, 4 signal lines 161-164, one group discriminating signal line 21, and one odd/even discriminating signal line 22. |
