发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To obtain a memory device which is capable of high-density integration and stably operative, by forming deep levels in the semiconductor layer of the gate region of a field effect transistor, and controlling the charged state of the deep levels. CONSTITUTION:In the depletion layer 6 of the N-channel silicon gate MOS transistor formed on a silicon substrate 1, deep levels 7 are formed by diffusion of the atoms of a metal such as Pt, Au, generation of a defect due to thermal distortion by local heating or the like. If the gate voltage is made negative, the depletion layer 6 disappears under a gate electrode 5, the deep levels 7 are covered with positive holes, electrons are emitted from the top level, the deep level becomes electrically neutral, and the threshold voltage becomes 1.25V. If the gate voltage is made positive to put all the deep levels in a state having trapped electrons, the threshold voltage becomes 1.35V. An appropriate voltage is applied between the source and the drain to detect a change in the drain current.
申请公布号 JPS61267362(A) 申请公布日期 1986.11.26
申请号 JP19850109726 申请日期 1985.05.22
申请人 NEC CORP 发明人 ONO YASUO;KUNIO TAKEMITSU
分类号 H01L27/108;H01L21/8242;H01L21/8247;H01L27/10;H01L29/788;H01L29/792 主分类号 H01L27/108
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