| 摘要 |
PURPOSE:To eliminate the need for a power synchronizing signal and to give immunity to an impulse noise by dividing each bit of a transmission signal into two so as to make the level of the 1st half of the signal different from the latter half level and detecting the bit synchronizing point where the center level of bits at each bit is fluctuated so as to correct the reception timing. CONSTITUTION:The bit constitution of a transmission data is shown in figure. The first half of a bit 21 is at L and the latter half is at H with logic '0' and conversely the first half of a bit 22 is at H and the latter half is at L at logic '1' and at the center of the bits 21, 22, the information of bit synchronizing point L H, H L where the level is fluctuated is include. Then the signal input is detected by a cycle being 14 times of the bit length. That is the leading of the 1st bit 22 of the digital signal is awaited by the processing cycle (a) normally. When the input of H is detected by the processing cycle (a), the cycle moves to the processing cycle (b) and the first half level of the 1st bit 22 is discriminated by the majority decision of succeeding 5 inputs. When the H level is discriminated, the cycle goes to the processing cycle (c) and the bit synchronizing point H L of the 1st bit 22 is detected. |
