| 摘要 |
PURPOSE:To attain the prevention of malfunction due to noise and to inhibit excess input by inputting the 3rd signal in common to the 1st or 2nd signal for additional of subtraction, opening a gate only at one one value of two of two inputs so as to operate counter thereby closing the gate at a fault. CONSTITUTION:The 1st and 3rd inputs, 1, 10 are subjected to waveform shaping by NAND Schmitt triggers 11, 12 and the result is inputted to a NAND gate 14. The NAND gate 14 and an OR gate 16 are set in on-state at no regulation. Thus, a pulse produced when the 1st and 3rd input signals are coincident is inputted to the clock terminal of an up-down counter 6. In inputting the output of counters 6, 17 as the gate condition for regulation to a NAND gate 18, the NAND gate 18 is turned on and the NAND gate 14 is turned off to inhibit the input to the counter 6. Thus, the possibility of malfunction due to noise is precluded and even when the signal is inputted continuously in error, the regulation is applied and high reliability against the prevention of the malfunction is attained. |
