| 摘要 |
PURPOSE:To attain fast response speed and the operation at a low voltage by constituting the titled circuit with a control circuit operated at a small level change of an input signal, an unsaturated self-hold circuit and a voltage comparison circuit. CONSTITUTION:When a pilot signal of a certain level or over is inputted to a phase comparator 5, the comparator 5 is frequency-divided by using a frequency of a voltage controlled oscillator 7 as an input signal and using an output of a phase inverter 8 as an inverting input signal at a frequency divider circuit 9, a frequency being the result of frequency division of outputs V1, V2 by a frequency divider circuit 10 and a pilot signal frequency are compared and its difference is fed to the voltage controlled oscillator 7 via a DCAmp 6. When the pilot signal has a lower frequency, a signal to lower the frequency of the voltage controlled oscillator 7 is outputted and when the pilot signal has a higher frequency, the signal increasing the frequency is outputted, thereby allowing the voltage controlled oscillator 7 to be synchronized with the pilot signal. Thus, the response speed of the frequency division circuit is quickened and the frequency division is attained to a voltage as low as nearly 0.9V. |
