发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To set the test mode without providing a private test terminal by providing a low voltage detecting circuit in a single semiconductor substrate and setting the test mode when a supply voltage is lower than a certain reference voltage. CONSTITUTION:Depletion transistors (TR) 3 and 4 and an inverter 5 constitutes the low voltage detector. Since TRs 3 and 4 are regarded as resistances equivalently, the input line to the inverter 5 is fixed to a potential, which is obtained by dividing a supply voltage VDD by resistances, and is set to a value between the voltage VDD and the ground voltage. The test mode is set when a test mode signal line 6 is in the high level, and the normal mode is set when the line 6 is in the low level, and the switching voltage of the inverter 5 is set between the lower limit of the operating supply voltage and the operation securing voltage. Thus, the test mode is set without providing the private test terminal.
申请公布号 JPS61264274(A) 申请公布日期 1986.11.22
申请号 JP19850105184 申请日期 1985.05.17
申请人 MATSUSHITA ELECTRONICS CORP 发明人 NIWA HIROSHI
分类号 H01L21/66;G01R31/28;G11C11/401;G11C29/00;G11C29/14;H01L21/822;H01L27/04 主分类号 H01L21/66
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