| 摘要 |
PURPOSE:To realize the high resistance value needed in an analogue circuit with a small pattern area and with relatively high accuracy by forming the diffusion layer of first conductive type which is shallower than a well in that well. CONSTITUTION:An N<++> buried layer 20 is formed on a P<-> silicon substrate 2 and an N<-> epitaxial layer 4 is formed. A P<++> isolation region 22 is formed for isolating a CMOS part, an NPN transistor part, and a well pinch resistance part of the epitaxial layer 4 and boron as an impurity is diffused in the CMOS part and the well pinch resistance part so as to form a well 6. Next, for the source and drain 24 and 26 used for a P-channel MOS transistor of the CMOS part and a base 28 of the NPN transistor part, boron as an impurity is diffused. Then, for the source and drain 30 and 32 used for a N-channel MOS transistor of the CMOS part, an emitter 34 of the NPN transistor part, a collector contact 36 and a diffusion layer 8 of the well pinch resistance part, phosphorus as an impurity is diffused. |
