发明名称 METHOD FOR INSPECTING MEMORY CELL ARRAY
摘要 PURPOSE:To detect a cross talk, a solid failure and a failure of an address signal system for a word unit by reading the data respective addresses of a memory cell array and writing a new data determined commonly to all the addresses when the data coincides with the previously written data. CONSTITUTION:An address counter is set to '000H', the data of 0H address are read, the read data are examined, and if it is 00H, a new data are written in the address 0H. The address is examined, and when it is not a final address, the address counter is made one lincrement. Accordingly, then, the data of a memory of a 1H address are read, and if the read data D1 is 00H, it is to be correct and a new data D2(01H) are written. In this manner, the address is made increment to be 2H, 3H... and a similar processing is repeated. When the address of the address counter becomes 7FFH, D2 is renewed from 01H to 03H and the processing is repeated and D2 goes to 00 and it is repeated until there is no new data to be renewed.
申请公布号 JPS61264600(A) 申请公布日期 1986.11.22
申请号 JP19850106543 申请日期 1985.05.17
申请人 SANYO ELECTRIC CO LTD 发明人 KATAYAMA HIROYUKI;IZUMIDA KAZUO
分类号 G01R31/26;G11C29/00;G11C29/10 主分类号 G01R31/26
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