| 摘要 |
PURPOSE:To reduce complexity and to improve detection rate by providing a by-pass circuit of input signals for each element and circuit of a logical circuit lined in the direction of signals and switching a front stage output and a by-pass circuit output from outside based on the indication of test unit and test mode. CONSTITUTION:When a RAM 14 is to be tested, only a switching circuit 10 is made to the RAM side and a by-pass side is selected for all others, and the signals from an input terminal 3 are inputted to the RAM 14 through a by-pass circuit 5 and a switching circuit 9. The output of the RAM 14 is outputted to a data output terminal 4 through the switching circuit 10, a by-pass circuit 7, a switching circuit 11, a by-pass circuit 8 and a switching circuit 12. As no complicated circuit exists on these routes, the change of the input data are transmitted surely, and the output data are transmitted surely to the output terminal. Accordingly, the increase of time for pattern decision in D algorithm etc. can be avoided even when the circuits between an input pin and output pin is large scaled or complicated. |
