发明名称 CONSTITUTING SYSTEM FOR VECTOR REGISTER
摘要 PURPOSE:To designate registers without decreasing the number of designatable registeres for each scalar unit and also to avoid the deterioration of the access throughput, by providing a means for dividing the bank of a vector register in response to the number of scalar units and to attain access from each dividing position. CONSTITUTION:The address positions of banks #0-#7 of a vector register VR20 are designated by the addresses set to address registers 230-237 respective ly. These addresses are supplied to the corresponding one of both registers 230 and 234 from an address input terminal 21 via a selector 22A or 22B. When the registers (#0-#3) of even numbers are designated, a bus is set at the left (L) of the selector 22A and the address on the terminal 21 is set to the register 230 and then shifted to registers 231-233. Thus access is given to a register (8 elements) of an even number among those set at the positions of banks (#0-#3). The access is also given to the registers of odd numbers in the same way by means of a bus set at the right (R).
申请公布号 JPS61262971(A) 申请公布日期 1986.11.20
申请号 JP19850105436 申请日期 1985.05.17
申请人 FUJITSU LTD 发明人 OKAMOTO TETSUO;SAKAMOTO KAZUSHI;UCHIDA NOBUO
分类号 G06F12/06;G06F12/00;G06F15/78;G06F17/16 主分类号 G06F12/06
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