| 摘要 |
PURPOSE:To facilitate transmission/reception of data commmuncation with many unspecified MODEMs by discriminating a training pattern different from a data signal speed sent by count of a counter counting an output of an OR circuit ORing plural bit displays so as to discriminate and decide a reception data signal speed. CONSTITUTION:For example, when a reception section 22 is set in 9600 bit/sec and a transmission data SD in 4800 bit/sec is sent, a pattern discrimination section 224 discriminates the pattern data. In converting the discriminated pattern into a 4-bit display value by a multi-value conversion section 228, the oldest and the youngest order number bits are displayed always by 0. The two display values are extracted in the OR circuit 229a, and the value counted by a counter 229a is identified as a data signal speed to be set for the normal reception of the data signal speed received by a controller 227 based on the data stored in a memory 229c and reset automatically so as to attain data reception easily in a correct speed. |
