| 摘要 |
PURPOSE:To transfer an instruction to an instruction register as fast as possible by left-justifying the instruction to be decoded at first among branch destination instruction data when branching is successful at the time of preceding reading of the instruction. CONSTITUTION:A block 200 has the same constitution as a reverse shift circuit 201 and an instruction buffer 202. At the moment when branch instruction is decoded and the read request of the branch destination instruction data is transmitted to a memory controller 1, a shift control circuit 103 has the number of shifts capable of left-justifying the top instruction of the branch instruction data. The number of shifts enough to right-justify the left-justified top instruction of the branch destination instruction data and to return it in the read-out state is initialized in a reverse shift control circuit 205 when said top instruction is transferred from the memory controller 1. Thus the decoding start of the branch destination instruction at the time of the successful branch can be quicker.
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