| 摘要 |
PURPOSE:To detect abnormal operation of a central processing unit CPU efficiently by a simple circuit by deciding that the CPU operates normally when a signal having a specific period is sent out to a separation signal terminal. CONSTITUTION:When an execution instruction is read in the CPU 1 from an external storage device, an address signal is outputted to the external storage device and an address and data separation signal 7 is outputted periodically. An integration circuit 2 integrates the address and data separation signal 4 outputted from the CPU 1 to shape the waveform into a level signal, which is outputted. The integral output signal 8 is inputted to a warning inhibition circuit 3 together with a warning inhibition signal 9 and the circuit 3 ORs the two inputs and outputs the result. In operation mode wherein the CPU 1 is not in abnormal operation, but the address and data separation signal 7 is not outputted, the warning state of the integral output signal 8 is inhibited by the warning inhibition circuit 3 and a warning signal 10 is not outputted. Consequently, the warning signal 10 is outputted only when the CPU 1 is in abnormal operation. |
