发明名称 MEMORY DUMPING SYSTEM
摘要 PURPOSE:To perform memory dumping operation even when an arithmetic device for main control is in trouble and to improve the reliability by controlling a channel adapter by the 2nd processor when the 1st processor is abnormal, and carrying out the dumping operation by the 2nd processor itself and channel adapter. CONSTITUTION:When the arithmetic device 12 is ready to operate, a maintenance operation processor 15 writes a dump program in an area of a memory 13 through a maintenance operation processor interface circuit 124 and then puts the arithmetic device 12 in operation. When it is decided whether the arithmetic device 12 operates or not and it is not expected to operate normally, the maintenance operation processor 15 controls registers 141, 142, and 143 directly through the maintenance operation processor interface circuit 124 to transfer data from the memory 13 to a host processor 2 through a channel adapter 14. Then, data of registers 122 and 123 and the memory 13 which are stored in a memory 152 or on a magnetic disk 154 previously are transferred to a specific area of the memory 13 and then transferred to the host processor 2 through the channel adapter 14.
申请公布号 JPS61260338(A) 申请公布日期 1986.11.18
申请号 JP19850102013 申请日期 1985.05.14
申请人 FUJITSU LTD 发明人 HIGUCHI TAIHO;TAKENO TADAYUKI;KABEMOTO AKIRA
分类号 G06F11/34;G06F11/22 主分类号 G06F11/34
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