LOW LEAKAGE CMOS D/A CONVERTER

摘要

A CMOS DAC with means to avoid leakage current. In one embodiment, the back gates of the CMOS switches are held at -200mV with respect to the output lines, and the logic low level to the off switch also is set at -200mV relative to the output lines. In another embodiment, the CMOS switches are ion-implanted. In a still further embodiment, the output lines are held at a potential 200mV more positive than the P- well of the CMOS switches.