| 摘要 |
PURPOSE:To reduce an occupied area and increase an information holding time by a method wherein a fine hole type capacitance element is provided so as not to cross with the gate electrode of MISFET and the first electrode of the fine hole type capacitance element is connected electrically to one semiconductor region of MISFET on the wall surface of the upper end of the fine hole. CONSTITUTION:A fine hole type capacitance element, provided in a semiconductor substrate 1 near MISFET, is constituted by a fine hole extending from the surface of the substrate 1 to the direction of the depth, an insulation film 7 formed on the inner wall of the fine hole, a conductive layer 8 formed in the fine hole so as to cover the surface of the insulation film 7, an insulation film 9 formed so as to cover the surface of the conductive layer 8 and a conductive layer 10 provided so as to fill the center part of the fine hole. A contact hole which is to be provided in the upper part of a semiconductor region 6 in order to connect the conductive layer 8 to the semiconductor region 6 is made to be unnecessary by connecting the conductive layer 8 to the semiconductor region 6 with this method. The conductive layer 8 is formed in the fine hole annularly and a conductive layer 10A is a buried electrode in the fine hole and electrically unified with the conductive layer 10 in the upper part of the fine hole. With this constitution, the area in the substrate occupied by a memory cell can be reduced and the integrity of DRAM can be increased. |
